Project background

Latest documentation for the I3C core

Latest documentation for the VeeR EL2 core

Required dependencies, env variables, repository overview, simulation flow and regression tests

Bus specification for comportable devices

Protocol checked description for the TileLink-UL bus

TileLink-UL bus testing overview

Overview of Power Manager's functionality

Description of fields stored in the OTP memory

Description of OTP partition attributes

Required dependencies, env variables, repository overview, simulation flow and regression tests for caliptra-rtl

Specification, overview of the functionality and a programmer's guide

Latest register description for caliptra-rtl components

Overview of a JTAG over DPI library

UART testing overview

ECC proofs

SHA256 testing overview

SHA512 testing overview

SHA512_MASKED testing overview

HMAC testing overview

DOE testing overview

HMAC DRGB testing overview

Required dependencies, env variables, repository overview, simulation flow and regression tests

Directory structure, building and testing for caliptra-sw

Description of FMC test cases

Overview of the runtime firmware

Describes test cases

Fatal and non-fatal error codes description

Overview of rules to ensure minimal possibility of security issues

Describes test cases

Instructions for generating register definitions from caliptra-rtl

Emulator's class and state diagrams

Example on how to interact with the Caliptra API and adapt it to the desired target

Example implementation of libcaliptra's hardware interface

Describes where Caliptra error codes are defined

Building and running C and Rust bindings for a verilated model of caliptra-rtl

Guide for building and running caliptra-rtl on an FPGA

Overview of the test suite and available test cases

General overview of Caliptra DPE

Description of DPE tests

Overview of the DPE simulator

Overview of caliptra-mcu-sw

Latest documentation for caliptra-mcu-sw

Description of the Security Protocol and Data Model used for secure communication between hardware components

Specification of the reference ROM, which gets executed when the MCU starts

Overview of the MCU runtime firmware architecture

Overview of Image Loading component, providing support for loading and verifying SoC images

Overview of the firmware update procedure

README of Caliptra's for of libtock

Description of the Platform Level Data Model, which is used for communication between management controllers and managed devices

Describes the package format used for Caliptra streaming boot and firmware updates

Overview of the MCTP protocol and API

Overview of MCU's features

Overview of the flash controller stack and its API

Integration specification for the Caliptra Subsystem

Integration specification for Caliptra RTL

Readme of the Caliptra project

Guidelines for contributing to the project

A formal charter of the Caliptra CHIPS Alliance Workgroup

Describes the release creation process

Branch naming convention

A script for generation of configurable blocks for the fuse_ctrl instantiation

Helper utility used for running Caliptra firmware on ZCU104 FPGA

Overview of the CI runner architecture

Utility used to ensure that all files have proper copyright headers

Layered Open-source Cryptographic Key management specification. This is an optional feature for Caliptra Subsystem 2.1+.